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Register Protocol
I2C Overview
The navX-sensor responds to 7-bit address 50 (0x32) on the I2C bus. If accessing the navX-sensor via the
I2C bus, ensure that no other device at that address is on the same bus.
The navX-sensor I2C bus operates at a speed up to 400Khz.
When accessing the navX-sensor via the I2C bus, this following pattern is used:
– The I2C bus master sends the navX-sensor I2C address. The highest bit is set to indicate the bus master
intends to write to the navX-sensor. If the highest bit is clear, this indicates the bus master intends to read
from the navX-sensor.
– The I2C bus master next sends the starting register address it intends to write to or read from.
– The I2C bus master next initiates I2C bus transactions. The navX-sensor supports I2C burst mode for
read operations, therefore the navX-sensor will respond with register values as long as the I2C bus master
continues the transaction, and as long as the last register address has not yet been reached.
If instead the I2C bus master intends to write data to a writable navX-sensor register, the bus master
should transmit the new register value immediately after sending the register address.
SPI Overview
The navX-sensor SPI data is communicated as follows:
– Most-significant bit first – Maximum Bitrate: 2mbps – Clock Polarity/Clock Phase – Mode 3
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