Analog Devices ADSP-21161N EZ-KIT Lite Manual page 110

A
3.3V
1
R155 R156 R157
10K 10K 10K
805 805 805
JP19
1
ID0
3
ID1
5
ID2
DSP ID IDC3X2
2
3.3V
R161 R162 R163
10K 10K 10K
805 805 805
3
JP21
1
CLKDBL
3
CLK_CFG1
5
CLK_CFG0
IDC3X2
CLOCK MODES
CLKDBL CLK_CFG1 CLK_CFG0 Core Clock Ratio
1 0 0 2:1
1 0 1 3:1
* 1 1 0 4:1
0 0 0 4:1
0 0 1 6:1
0 1 0 8:1
* DENOTES FACTORY DEFAULT
4
A
B
2
SJ23
4 SHORTING
JUMPER
6 DEFAULT=1 & 2
SJ24
SHORTING
JUMPER
DEFAULT=3 & 4
SJ25
SHORTING
JUMPER
DEFAULT=5 & 6
SJ29
2 SHORTING
JUMPER
4 DEFAULT=NOT INSTALLED
6 SJ30
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
SJ31
SHORTING
JUMPER
DEFAULT=5 & 6
EP Clock Ratio
1x
1x
1x
2x
2x
2x
B
C
3.3V
R158 R159 R160
10K 10K 10K
805 805 805
JP20
1 2
EBOOT
3 4
LBOOT
5 6
BMS
IDC3X2
BOOT MODES
EBOOT LBOOT BMS Booting Mode
* 1 0 Output EPROM
0 0 1 (Input) Host Processor
0 1 0 (Input) Serial Boot via SPI
0 1 1 (Input) Link Port
0 0 0 (Input) No Booting
1 1 x (Input) Reserved
* DENOTES FACTORY DEFAULT
REMOVE JP22 WHEN USING SPI OR NO BOOT MODES (REFER TO SHEET 4)
SW9
1 16
LOOP_ADC1_LEFT
2 15
LOOP_ADC1_RIGHT
3 14
4 13
5 12
LOOP_ADC2_LEFT
6 11
LOOP_ADC2_RIGHT
7 10
8 9
SWT016
DIP8
TURNING THE SWITCHES ON PUTS THE BOARD IN LOOPBACK MODE
Approvals
Drawn
Checked
Engineering
C
D
SJ26
SHORTING
JUMPER
DEFAULT=3 & 4
SJ27
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
SJ28
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
LOOP_DAC1_LEFT
LOOP_DAC1_RIGHT
LOOP_DAC2_LEFT
LOOP_DAC2_RIGHT
LOOP_DAC3_LEFT
LOOP_DAC3_RIGHT
LOOP_DAC4_LEFT
LOOP_DAC4_RIGHT
ANALOG 20 Cotton Road
Nashua, NH 03063
DEVICES
Title 21161N EZ-KIT LITE - CONFIGURATION
Date
Size Board No.
A0157-2000
B
Date
11-12-2002_17:12
D
1
2
3
4
Rev
2.4
Sheet 19 OF 24