QSPI FLASH is connected to the GPIO port of the BANK500 in the PS
section of the ZYNQ chip. In the system design, the GPIO port functions of
these PS ports need to be configured as the QSPI FLASH interface. Figure 4-1
shows the QSPI Flash in the schematic.
Configure chip pin assignments:
Signal Name
MIO0_QSPI0_SCLK
MIO1_QSPI0_IO1
MIO2_QSPI0_IO2
MIO3_QSPI0_IO3
MIO4_QSPI0_IO0
MIO5_QSPI0_SS_B
Part 5: eMMC Flash
The ACU4EV core board is equipped with a large-capacity 8GB eMMC
FLASH chip, the model is MTFC8GAKAJCN-4M, it supports the HS-MMC
interface of the JEDEC e-MMC V5.0 standard, and the level supports 1.8V or
3.3V. The data width of eMMC FLASH and ZYNQ connection is 8bit. Due to the
large-capacity and non-volatile characteristics of eMMC FLASH, it can be used
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ZYNQ Ultrascale + FPGA Core Board ACU4EV User Manual
Figure 4-1: QSPI Flash in the schematic
PS_MIO0_500
PS_MIO1_500
PS_MIO2_500
PS_MIO3_500
PS_MIO4_500
PS_MIO5_500
Amazon Store:
Sales Email:
Pin Name
https://www.amazon.com/alinx
rachel.zhou@aithtech.com
Pin Number
AG15
AG16
AF15
AH15
AH16
AD16
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