Alinx ACU4EV User Manual page 12

ZYNQ Ultrascale + FPGA Core Board ACU4EV User Manual
PS_DDR4_DM1
PS_DDR4_DM2
PS_DDR4_DM3
PS_DDR4_DM4
PS_DDR4_DM5
PS_DDR4_DM6
PS_DDR4_DM7
PS_DDR4_A0
PS_DDR4_A1
PS_DDR4_A2
PS_DDR4_A3
PS_DDR4_A4
PS_DDR4_A5
PS_DDR4_A6
PS_DDR4_A7
PS_DDR4_A8
PS_DDR4_A9
PS_DDR4_A10
PS_DDR4_A11
PS_DDR4_A12
PS_DDR4_A13
PS_DDR4_WE_B
PS_DDR4_CAS_B
PS_DDR4_RAS_B
PS_DDR4_ACT_B
PS_DDR4_ALERT_B
PS_DDR4_BA0
PS_DDR4_BA1
PS_DDR4_BG0
PS_DDR4_CS0_B
PS_DDR4_ODT0
PS_DDR4_PARITY
PS_DDR4_RESET_B
PS_DDR4_CLK0_P
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PS_DDR_DM1_504
PS_DDR_DM2_504
PS_DDR_DM3_504
PS_DDR_DM4_504
PS_DDR_DM5_504
PS_DDR_DM6_504
PS_DDR_DM7_504
PS_DDR_A0_504
PS_DDR_A1_504
PS_DDR_A2_504
PS_DDR_A3_504
PS_DDR_A4_504
PS_DDR_A5_504
PS_DDR_A6_504
PS_DDR_A7_504
PS_DDR_A8_504
PS_DDR_A9_504
PS_DDR_A10_504
PS_DDR_A11_504
PS_DDR_A12_504
PS_DDR_A13_504
PS_DDR_A14_504
PS_DDR_A15_504
PS_DDR_A16_504
PS_DDR_ACT_N_504
PS_DDR_ALERT_N_504
PS_DDR_BA0_504
PS_DDR_BA1_504
PS_DDR_BG0_504
PS_DDR_CS_N0_504
PS_DDR_ODT0_504
PS_DDR_PARITY_504
PS_DDR_RST_N_504
PS_DDR_CK0_P_504
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AE23
AE25
AE28
R23
H23
L27
H26
W28
Y28
AB28
AA28
Y27
AA27
Y22
AA23
AA22
AB23
AA25
AA26
AB25
AB26
AB24
AC24
AC23
Y23
U25
V23
W22
W24
W27
U28
V24
U23
W25