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B.1.7
Register 7: WatchDog Timer Reset Control Register
(WDTRSTCTR)
OFFSET = 0x018
Based on the watchdog timer time-out frequency which is stored in WDTTR,
WDTINTCTR sets the period of reset. WDTTR plus one as watchdog timer time out
occurred. While the number of occurrences exceeds the value saved in
WDTINTCTR, a reset signal would be issued.
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
User
Settings
Reserved
Bits
Access
31:8
RO
7:0
R/W
B.1.8
Register 8: WatchDog Timer Alarm Digital Output
(WDTALARMDO)
OFFSET = 0x01C
WDTALARMDO is an alarm which indicates whether watchdog timer time-out occurs.
As soon as watchdog timer time-out takes place, WDTALARMDO
would be set to one till be cleared.
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
User
Settings
Reserved
Bits
Access
31:1
-
0
-
Name D
Description
-
Reserved 0
x00 = reset
WDTRSTCTR
Reset Occurrence Frequency Setup:
A reset issued when the number of times of
watchdog timer time-out is greater than the
value store in
WDTRSTCTR.
0x00 = reset
Name D
Description
-
Reserved 0
x00 = reset
WDTALARMDO
Watchdog Timer Timer-out Alarm
0 = reset
1 = watchdog time out takes place
41
WDTRSTCTR
UNO-4673A/4683 Series User Manual
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