Table of Contents
Advertisement
OPTIMOD
fied audio data with MSB aligned with the leading edge of LRCK. Data is latched
on the falling edge of SCLK. The processed digital output (ANLG_OUT) is pro-
vided by DSP IC707 on its SAI output port SDO2 (pin 45), and is received by the
D/A on pin 10.
A 6.144MHz bit clock is provided from the system clock circuitry to both the fi-
nal DSP and the D/A chips. The DSP output data format is 32 bits per word, two
words per frame. DSP chip IC707 receives a 48kHz frame clock at its WST input
(pin 50) that sets the word transfer rate to two words per 48kHz period. The D/A
receives a 48kHz clock at its LRCK input (pin 7). LRCK delineates the left and
right samples used by the D/A; therefore the D/A uses the first sample received
for the left output and the second sample for the right output. The DSP output
samples are formatted to ensure that the D/A uses samples that represent the si-
multaneously sampled analog input.
2. Analog Output Stages
The left and right analog signals emerging from the digital-to-analog (D/A) converter are
each filtered, amplified, and applied to a floating-balanced line driver, having a 30Ω,
±5% output impedance. The line driver outputs are applied to the RF-filtered left and
right analog output connectors. These analog signals provide a convenient means of
monitoring the processed audio.
Component-Level Description:
The left channel signal emerging from the digital-to-analog (D/A) converter is fil-
tered by IC404-A, IC404-B, IC406-A, and associated components. The purposes
of these stages are to remove common-mode errors including noise, distortion,
and DC offset, and to reduce the out-of-band noise energy resulting from the
delta-sigma D/A's noise-shaping filter.
IC404-A, IC404-B, and associated components implement a 3
low-pass filter characteristic to the differential signal from the D/A. The 20kHz
passband nominally has 0.05dB ripple and about 7 degrees of deviation from lin-
ear-phase. This low-sensitivity filter, utilizing tight tolerance components, does
not induce significant overshoot of the processed audio, which would otherwise
waste modulation.
IC406-A and associated components comprise a low-frequency servo amplifier to
remove residual DC from the signal. The 0.15Hz −3dB frequency averts tilt-
induced overshoot of the processed audio.
IC404-B feeds the stage consisting of IC403-A, IC403-B, IC402-A, and associ-
ated components, which is a floating-balanced line driver. The floating character-
istic is achieved by complex cross-coupled positive and negative feedback be-
tween two 5532 opamps, and its operation is not readily explainable except by a
detailed mathematical analysis. Opamps may be replaced; resistors are specially
matched and should not be replaced. IC402-A, R408, R409, R412, and C410
comprise a servo amplifier, which centers around ground the average DC level at
output connector J400.
TECHNICAL DATA
rd
order Chebychev
6-15
Advertisement
Table of Contents
