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UM-PM-029
DA9213, DA9214, and DA9215 Performance
Boards
This example configures 1.2 V in VBUCKA_CTRL_A and 0.8 V in VBUCKA_CTRL_B. After
asserting the BUCK_SEL bit the DVC transition in the output voltage is as shown in
Figure
16.
Figure 16: DVC Transition
The voltage is decreased by 400 mV in approximately 40 µs, therefore, the slope of the DVC
transition can be seen as 10 mV/µs.
The value can be set on the SLEW_RATE1 field of CONTROL_A register. This field is located on
the Buck tab of the GUI, as shown by the red arrow in
Figure
17.
Do not confuse the slew rate setting of DVC voltage changes with the UP_CTRL, DOWN_CTRL of
each buck, as they do only refer to the power up and power down slope.
Figure 17: Buck Tab CONTROL_A Register Field
User Manual
Revision 2.0
25-Feb-2022
CFR0012
24 of 37
© 2022 Renesas Electronics
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