General Information - ST STM32CubeL5 User Manual

1

General information

The STM32CubeL5
® ‑M processor.
Cortex
Note: ®
Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
The following table presents the definition of acronyms that are relevant for a better understanding of this
document.
Acronym
AEAD Authenticated encryption with associated data
CLI Command line interface
EAT Entity attestation token
GUI Graphic user interface
HDP Secure hide protection
HUK Hardware unique key
HW Hardware
IAT Initial attestation
IPC Inter process communication
ITS Internal storage service. Internal storage service provided by TF-M.
Non-secure processing environment PSA term. In TF-M this means non secure domain typically running an
NSPE
operating system using services provided by TF-M.
MPU Memory protection unit
PSA Platform security architecture. Framework for securing devices.
RoT Root of trust
Secure boot and secure firmware update. In the STM32CubeL5 this is the name of the TF-M based application,
SBSFU
with secure boot and secure firmware update functionalities only.
SESIP Security evaluation standard for IoT platforms
SFN Secure function. An entry function to a secure service. Multiple SFN per SS are permitted.
SP Secure partition. A logical container for a single secure service.
SPE Secure processing environment PSA term. In TF-M this means the secure domain protected by TF-M.
Secure partition manager. The TF-M component responsible for enumeration, management and isolation of
SPM
multiple secure partitions within the TEE.
Secure service. A component within the TEE that is atomic from a security/trust point of view, i.e. which is viewed
SS
as a single entity from a TF-M point of view.
SST Secure storage service. Secure storage service provided by TF-M.
SW Software
TBSA-M
Trusted base system architecture for Arm
TFM In the STM32CubeL5 this is the name of the TF-M based application with complete functionalities.
Trusted firmware for M-class Arm. TF-M provides a reference implementation of secure world software for
TF-M
Armv8‑M.
TOE Target of evaluation
UM2745 - Rev 1
TFM application runs on STM32L5 Series 32-bit microcontrollers based on the Arm
Table 1.
®
List of acronyms
Description
®
Cortex -M
UM2745
General information
®
page 2/36