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LVDS1
Pin
Signal
M1 GND
2
PVDD1
4
PVDD1
6
GND
8
GND
10 LVDS1_A0-
12 LVDS1_A0+
14 GND
16 LVDS1_A1-
18 LVDS1_A1+
20 GND
22 LVDS1_A2-
24 LVDS1_A2+
26 GND
28 LVDS1_ACLK-
30 LVDS1_ACLK+
32 GND
34 LVDS1_A3-
36 LVDS1_A3+
38 LCD1_CLK
40 LCD1_DATA
Table 13: LVDS panel connectors pinouts
2.2.3 Backlight Control Connectors
The VIA EPIA-M930 has two backlight control connectors labeled as LVDS1_BL1 and LVDS2_BL1. The backlight
control connectors are for backlight power and brightness control. LVDS1_BL1 corresponds to the LVDS1
panel connector. LVDS2_BL1 corresponds to the LVDS2 panel connector. The pinouts of the backlight control
connectors are shown below.
1
Inverter2
Figure 16: Backlight control connectors diagram
Pin
Signal
Pin
M1 GND
1
LVDS1_B0-
3
LVDS1_B0+
5
GND
7
LVDS1_B1-
9
LVDS1_B1-
10 LVDS2_A0-
11 GND
12 LVDS2_A0+
13 LVDS1_B2-
14 GND
15 LVDS1_B2+
16 LVDS2_A1-
17 GND
18 LVDS2_A1+
19 LVDS1_BCLK-
20 GND
21 LVDS1_BCLK+
22 LVDS2_A2-
23 GND
24 LVDS2_A2+
25 LVDS1_B3-
26 GND
27 LVDS1_B3+
28 LVDS2_ACLK-
29 NC
30 LVDS2_ACLK+
31 GND
32 GND
33 +V3.3
34 LVDS2_A3-
35 NC
36 LVDS2_A3+
37 NC
38 LCD2_CLK
39 NC
40 LCD2_DATA
VIA EPIA-M930 User Manual
LVDS2
Signal
Pin
2
PVDD2
1
4
PVDD2
3
6
GND
5
8
GND
7
9
11 GND
13 LVDS2_B2-
15 LVDS2_B2+
17 GND
19 LVDS2_BCLK-
21 LVDS2_BCLK+
23 GND
25 LVDS2_B3-
27 LVDS2_B3+
29 NC
31 GND
33 +V3.3
35 NC
37 NC
39 NC
1
Inverter1
Signal
LVDS2_B0-
LVDS2_B0+
GND
LVDS2_B1-
LVDS2_B1+
13
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