Digital I/O Pin Header; Figure 17: Digital I/O Pin Header Diagram; Table 14: Backlight Control Connectors Pinouts; Table 15: Digital I/O Pin Header Pinouts - VIA Technologies EPIA-M930 User Manual

Table 14: Backlight control connectors pinouts

2.2.4 Digital I/O Pin Header

The VIA EPIA-M930 includes one Digital I/O pin header that supports four GPO and four GPI pins. The pinouts
of the Digital I/O pin header are shown below.
DIO1
1

Figure 17: Digital I/O pin header diagram

Table 15: Digital I/O pin header pinouts

LVDS1_BL1
Pin Signal
1 VDD_BL1
2 VDD_BL1
3 BL1_EN_CON
4 BL1_CTRL_CON
5 BL1_EN_CON
6 BL1_CTRL_CON
7 GND
8 GND
Pin Signal
1 5V_DIO
3 GPO_1
5 GPO_2
7 GPO_3
9 GPO_4
11 GND
VIA EPIA-M930 User Manual
LVDS2_BL2
Pin Signal
1 VDD_BL2
2 VDD_BL2
3 BL2_EN_CON
4 BL2_CTRL_CON
5 BL2_EN_CON
6 BL2_CTRL_CON
7 GND
8 GND
Pin Signal
2 12V_DIO
4 GPI_1
6 GPI_2
8 GPI_3
10 GPI_4
12 —
14