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Data Retention Timing (STOP Mode Release by RESET)
V
DD
STOP instruction execution
RESET
Data Retention Timing (Standby Release Signal: STOP Mode Release by Interrupt Request Signal)
V
DD
STOP instruction execution
Standby release signal
(interrupt request)
Oscillation Stabilization Wait Time (T
Parameter
Oscillation stabilization
t
WAIT
Note 1
wait time
Notes 1. Use a resonator whose oscillation stabilizes within the oscillation stabilization wait time.
2. Selection of 2
stabilization time selection register (OSTS).
Remarks 1. f
: Main system clock oscillation frequency (crystal/ceramic oscillation)
X
2. f
: Main system clock oscillation frequency (RC oscillation)
CC
CHAPTER 20 ELECTRICAL SPECIFICATIONS
STOP mode
Data retention mode
V
DDDR
STOP mode
Data retention mode
V
DDDR
= –40 to +85°C, V
A
Symbol
Conditions
Release by RESET
Release by interrupt
12
15
17
/f
, 2
/f
, or 2
/f
is possible with bits 0 to 2 (OSTS0 to OSTS2) of the oscillation
X
X
X
User's Manual U15075EJ2V1UD
Internal reset operation
t
SREL
t
SREL
= 1.8 to 5.5 V)
DD
MIN.
Crystal/ceramic
oscillation
RC oscillation
Crystal/ceramic
oscillation
RC oscillation
HALT mode
Operation mode
t
WAIT
HALT mode
Operation mode
t
WAIT
TYP.
MAX.
Unit
15
2
/f
s
X
7
2
/f
s
CC
Note 2
s
7
2
/f
s
CC
331
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