Table 25 Cn3 Backlight Power Output Wafer For Lvds1; Table 26 Cn4 Sim Interface Wafer For Mpcie1; Table 27 Cn5 Usb 2.0 Port 2, 3 Pin Header; Table 28 Cn6 Usb 2.0 Port 10, 11 Pin Header - Quanmax KEEX-6150 Series User Manual

Table 25 CN3 Backlight Power Output Wafer for LVDS1

1
3
5
7
1
3
5
7
KEEX-6100 Series User's Manual
Pin
1
2
3
4
5
6
7
Pitch:1.25mm [YIMTEX 501MW1X07MTR-1R]
* BL_ADJ can be setting in BIOS setup.
** Backlight Power can be selected by JP3.
*** BL_EN can be selected by JP4.

Table 26 CN4 SIM Interface Wafer for MPCIE1

Table 27 CN5 USB 2.0 Port 2, 3 Pin Header

Pin
2
1
4
3
6
5
8
7
10
9
Pitch:2.54mm [YIMTEX 3362*05SANGR-09]

Table 28 CN6 USB 2.0 Port 10, 11 Pin Header

Pin
2
1
4
3
6
5
8
7
10
9
Pitch:2.54mm [YIMTEX 3362*05SANGR-09]
Signal Name
BL_ADJ_PWM *
BL_ADJ_VOL *
+5V / +12V **
+5V / +12V **
BL_EN***
Pin Signal Name
1 UIM_PWR
2 UIM_DATA
3 UIM_RESET
4 UIM_VPP
5 UIM_CLK
6 GND
Pitch:1.25mm [Pinrex 712-73-06TWB0]
Signal Name Pin
+USBVCC 2
USB_A- 4
USB_A+ 6
GND 8
KEY 10
Signal Name Pin
+USBVCC 2
USB_A- 4
USB_A+ 6
GND 8
KEY 10
31
Chapter 2
GND
GND
Signal Name
+USBVCC
USB_B-
USB_B+
GND
GND
Signal Name
+USBVCC
USB_B-
USB_B+
GND
GND