Table Of Contents; Trademarks - Texas Instruments ADC DJ 00RF Series User Manual

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1 Trademarks..............................................................................................................................................................................3
2 Equipment...............................................................................................................................................................................
3 Setup Procedure.....................................................................................................................................................................
4 Device Configuration............................................................................................................................................................13
5 Troubleshooting the ADC12DJ5200RFEVM.......................................................................................................................
6 References............................................................................................................................................................................
7 HSDC Pro Settings for Optional ADC Device Configuration............................................................................................
8 Signal Routing.......................................................................................................................................................................23
A Analog Inputs.......................................................................................................................................................................
B Jumpers and LEDs...............................................................................................................................................................26
B Revision History...................................................................................................................................................................26
Figure 1-1. EVM Orientation........................................................................................................................................................
Figure 2-1. EVM Feature Locations.............................................................................................................................................4
Figure 3-1. EVM Test Setup.........................................................................................................................................................6
Figure 3-2. Configuration GUI EVM Tab......................................................................................................................................
Figure 3-3. Configuration GUI ADC Control................................................................................................................................
Figure 3-4. High Speed Data Converter Pro (HSDC) GUI.........................................................................................................
Figure 3-5. Additional Device Parameters Dialog
Figure 4-1. Low-Level Register Control Tab..............................................................................................................................
Figure 7-1. ADC12DJ5200RFEVM Clocking System Block
Figure 7-2. Onboard Clocking System Block Diagram..............................................................................................................
Figure 7-3. External Reference Clocking System Block Diagram.............................................................................................
Figure 7-4. External Clock Configuration...................................................................................................................................21
Figure 7-5. Onboard Clocking Configuration.............................................................................................................................
Figure A-1. Analog Input Path...................................................................................................................................................
Figure A-2. 3 dB attenuation
Table 4-1. Supported and Non-Supported Features of the JESD204C Device.........................................................................
Table 4-2. Low-Level Controls...................................................................................................................................................
Table 5-1. Troubleshooting........................................................................................................................................................
Table 8-1. ADCxxDJxx00RFEVM Signal
Table A-1. Analog Input Path.....................................................................................................................................................
Table 10-1. Jumper Settings......................................................................................................................................................
Table 10-2. LEDs.......................................................................................................................................................................

1 Trademarks

Trilithic ™ is a trademark of Trilithic, Inc.
K&L Microwave ™ is a trademark of K&L Microwave.
Microsoft ® and Windows ®
Rohde & Schwarz ® are registered trademarks of Rohde & Schwarz GmbH & Co.
All trademarks are the property of their respective owners.
SLAU640A - APRIL 2019 - REVISED JUNE 2021
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Table of Contents

List of Figures
Box...............................................................................................................12
pad...............................................................................................................................................25
List of Tables
Routing......................................................................................................................23
are registered trademarks of Microsoft Corporation.
Copyright © 2021 Texas Instruments Incorporated
Diagram........................................................................................18
Table of Contents
ADCxxDJxx00RF Evaluation Module
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