Summary of Contents for Texas Instruments DAC5652AEVM
Page 1
(DAC) in a variety of configurations. Throughout this document, the terms evaluation board, evaluation module, and EVM are synonymous with the DAC5652AEVM. This document includes a schematic, printed circuit board (PCB) layouts, and a complete bill of materials (BOM).
EVM to allow external reference to be provided to the DAC. Required Hardware and Software The following hardware and software are required to evaluate the DAC5652A device: • DAC5652AEVM: Main circuit board containing the DAC to be evaluated • TSW1400EVM: Hardware that generates digital patterns for the DAC: TSW1400EVM •...
DAC5652AEVM Operation Procedure The DAC5652AEVM can be set up in a variety of configurations to accommodate a specific mode of operation. Before starting evaluation, the user must decide on the configuration and make the appropriate connections or changes. The demonstration board comes with following factory-set configuration: Single clock source mode using a clock input at J3.
Ground Ground 3.2.1 Output Signal The DAC5652AEVM can be configured to drive a doubly terminated 50-Ω cable or provide unbuffered differential outputs. 3.2.2 Transformer-Coupled Signal Output The factory-set configuration of the demonstration board provides the user with a single-ended output signals from channel A and B of the DAC at SMA connector J1 and J4.
R23 is used to set the output current of channel A and R22 is used to set channel B. Device Modes and Settings Sleep Mode The DAC5652AEVM provides a means of placing the DAC5652A into a power-down mode. This mode is activated by placing jumper J10 between pins 5 and 6. Gain Set The full-scale output current on the DAC5652A can be set two ways: both channels independently or simultaneously.
Page 8
STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
Page 9
FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
Page 10
【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿6丁目24番1号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 3.4 European Union 3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a low-voltage power-supply network that supplies buildings used for domestic purposes.
Page 12
IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...