Analog Devices ADSP-BF537 EZ-KIT Lite Manual page 93

Evaluation system
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Index
PH15-0 signals,
2-6
PJ10-6 signals,
2-12
power
connector (J7),
2-23
LED (LED7),
2-19
regulator circuit, 2-13,
select jumper (JP3),
supply,
1-3
Power-over-Ethernet (PoE),
PPI4_CLK signals,
2-5
PPI connector (P8),
2-25
PPI_D15-0 signals,
2-5
PPI_FS3-1 signals,
2-5
programmable flags (PFs)
PF0-1 (UART), 2-4,
PF12 (audio), 2-5,
2-7
PF13-15 (CAN), 1-16, 2-5,
PF2-5 (IO), 1-18, 2-4, 2-7, 2-11,
PF6-11 (IO), 1-18, 2-5, 2-7,
push buttons
See also switches by name (SWx)
diagram of locations,
R
real-time clock (RTC),
Reduced Instruction Set Computing
(RISC),
ix
regulators,
2-2
reset
audio interface,
2-5
LEDs (LED8),
2-19
processor,
2-7
push button (SW9),
RFS0 signals,
2-12
RIGHT_IN signals,
2-16
RIGHT_OUT signals,
RJ-45 connectors,
1-16
RMII_MDINT signals,
RMII_REF_CLK signals,
RS-232 connectors (J6), xiii,
I-4
2-14
2-13
2-14
2-7
2-7
2-19
2-20
2-18
2-3
2-18
2-15
2-6
2-6
2-23
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
RTS signals,
2-11
RXD (receive data output) signals, 1-16,
2-10
RX signals, 2-4,
2-11
S
schematic, of ADSP-BF537 EZ-KIT Lite,
B-1
SCLK signals,
1-14
SDRAM
connections,
2-3
default settings,
1-13
interface,
1-13
memory map,
1-12
optimum settings, 1-13,
serial clock (SCL) signals,
serial peripheral interface, See SPI
SMS0 (SDRAM select) pin, 1-11,
SPI
connector (P9),
2-26
interface,
2-4
SPI_MOS1-0 signals,
2-5
SPI_SCK signals,
2-5
SPI_SSEL1 signals,
2-5
SPI_SSEL6-4 signals,
2-4
SPI_SS signals,
2-5
SPORT0
connector (P6),
2-25
interface, xiii, 1-17, 2-4,
SPORT1
connector (P7),
2-25
interface,
2-7
SRAM,
1-11
See also internal memory
startup, of this EZ-KIT Lite,
CCES,
1-4
STB (standby control input) signals, 1-16,
2-5,
2-10
stereo input/output channels,
SW10-13 (PF2-5) push buttons, 2-5,
1-14
1-13
2-3
2-7
1-8
1-17
2-19

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