Analog Devices ADSP-BF537 EZ-KIT Lite Manual page 92

Evaluation system
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frequency,
1-13
FS loopback signals,
2-13
FUNCT_OUT signals,
G
general-purpose IO pins, 1-18, 2-4, 2-9,
2-11,
2-20
GND signals,
2-7
I
IEEE 802.3-2002 standard,
installation, of this EZ-KIT Lite,
CCES,
1-4
interfaces, See audio, CAN, ELVIS,
Ethernet, expansion, SDRAM
internal memory
core/system MMRs,
data banks A, B SRAM,
data banks A, B SRAM/CACHE,
instruction banks A, B SRAM,
instruction SRAM/CACHE,
reserved,
1-12
scratch pad SRAM,
1-12
via JTAG,
2-8
internal regulator,
2-2
IO voltage,
2-2
J
JTAG
connector (ZP4),
2-24
emulation port,
2-8
jumpers
diagram of locations,
JP3 (power),
2-13
JP5 (expansion voltage),
JP6 (ELVIS voltage),
JP8 (ELVIS select),
2-17
JP9 (UART),
2-15
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-16
1-16
1-8
1-12
1-12
1-12
1-12
1-12
2-9
2-14
2-16
L
LabVIEW virtual instruments, xii,
LEDs
diagram of locations,
LED1-6 (PF6-11), 1-18, 2-5,
LED7 (power),
2-19
LED8 (reset),
2-19
ZLED3 (USB monitor), 1-8,
LEFT_IN signals,
2-16
LEFT_OUT signals,
2-15
license restrictions,
1-11
M
MAC address, xi, 1-12, 1-15,
Media Access Controller, See MAC
Media Instruction Set Computing (MISC),
ix
memory
map, of this EZ-KIT Lite,
select pins, See AMS3-0, SMS0
Micro Signal Architecture (MSA),
MII_CRS signals,
2-7
MII_PHYINT signals,
MII_TXCLK signals,
2-6
N
notation conventions,
xviii
O
oscilloscope configuration switch (SW1),
2-15
P
package contents,
1-3
PB1-4 (SW13-10) push buttons,
PF1 signals,
2-11
PG7-6 signals,
2-11
Index
1-17
2-18
2-20
2-20
1-16
1-11
ix
2-6
2-11
I-3

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