Mitsubishi MELSEC-Q Series User Manual page 160

Programmable controller multiple cpu system
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4
COMMUNICATIONS BETWEEN CPU MODULES
CPU shared memory
Host CPU operation information area
Restricted system area
Auto refresh area
User setting area
1) Read by END
processing of CPU No. 1
B0 to B1F (for CPU No. 1)
B20 to B3F (for CPU No. 2)
4
- 10
4.1 Communications between CPU modules using CPU shared memory
4.1.2 Communication by auto refresh using CPU shared memory
Diagram 4.5 shows an outline of operations when CPU No.1 performs auto
refresh of 32 points for B0 to B1F, and when CPU No.2 performs auto refresh of
32 points for B20 to B3F.
CPU No. 1
Device
The processes performed during CPU No.1 END process.
1): Transfers B0 to B1F transmission device data for CPU No.1 to the host
CPU shared memory's auto refresh area.
4): Transfers data in the CPU No.2 CPU shared memory's auto refresh area
to B20 to B3F in the host CPU.
The processes performed during CPU No.2 END process.
2): Transfers B20 to B3F transmission device data of CPU No.2 to the CPU
shared memory's auto refresh area.
3): Transfers data in CPU No.1 CPU shared memory's auto refresh area to
B0 to B1F in CPU No.2.
Diagram 4.5 Operation of auto refresh
(b) Executing auto refresh
Auto refresh is executed when the CPU module is in RUN, STOP or PAUSE
status. Auto refresh cannot be performed when a stop error has been triggered in
the CPU module.
If a stop error occurs on one module, the other modules without any error will save
the data prior to the stop error being triggered.
For example, if a stop error occurs in CPU No.2 when B20 is ON, the B20 in CPU
No.1 will remain ON, as shown in the operation outline in Diagram 4.5.
(c) Settings required for auto refresh
When auto refresh is carried out, it is necessary to set the points to be transmitted
by each CPU and the device in which the data is to be stored (the device that will
perform auto refresh) with the PLC parameter's multiple CPU settings.
3)
Read by END
processing CPU No.
4)
Read by END
processing of CPU No. 1
CPU No. 2
CPU shared memory
Host CPU operation information area
Restricted system area
Auto refresh area
User setting area
2)
Read by END
processing of
CPU No. 2
Device
B0 to B1F (for CPU No. 1)
B20 to B3F (for CPU No. 2)

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