NEC V850/SB1TM User Manual page 496

Symbol
DIOA3 DMA peripheral I/O address register 3
DIOA4 DMA peripheral I/O address register 4
DIOA5 DMA peripheral I/O address register 5
DLR IEBus telegraph length register
DMAIC0 Interrupt control register
DMAIC1 Interrupt control register
DMAIC2 Interrupt control register
DMAIC3 Interrupt control register
DMAIC4 Interrupt control register
DMAIC5 Interrupt control register
DMAS DMA start factor expansion register
DR IEBus data register
DRA0 DMA internal RAM address register 0
DRA1 DMA internal RAM address register 1
DRA2 DMA internal RAM address register 2
DRA3 DMA internal RAM address register 3
DRA4 DMA internal RAM address register 4
DRA5 DMA internal RAM address register 5
DWC Data wait control register
ECR Interrupt source register
EGN0 Falling edge specification register 0
EGP0 Rising edge specification register 0
EIPC Status saving register during interrupt
EIPSW Status saving register during interrupt
FEPC Status saving registers for NMI
FEPSW Status saving registers for NMI
IEBIC1 Interrupt control register
IEBIC2 Interrupt control register
IECLK IEBus clock selection register
IIC0 IIC shift register 0
IIC1 IIC shift register 1
IICC0 IIC control register 0
IICC1 IIC control register 1
IICCE0 IIC clock expansion register 0
IICCE1 IIC clock expansion register 1
IICCL0 IIC clock selection register 0
IICCL1 IIC clock selection register 1
IICIC1 Interrupt control register
496
APPENDIX A REGISTER INDEX
Name
User's Manual U13850EJ4V0UM
(3/7)
Unit Page
DMAC 360
DMAC 360
DMAC 360
IEBus 465
INTC 139 to 141
INTC 139 to 141
INTC 139 to 141
INTC 139 to 141
INTC 139 to 141
INTC 139 to 141
DMAC 366
IEBus 466
DMAC 361
DMAC 361
DMAC 361
DMAC 361
DMAC 361
DMAC 361
BCU 111
CPU 76
INTC 132, 378
INTC 132, 378
CPU 76
CPU 76
CPU 76
CPU 76
IEBus 139 to 141
IEBus 139 to 141
IEBus 477
2
I C 268
2
I C 268
2
I C 257
2
I C 257
2
I C 266
2
I C 266
2
I C 265
2
I C 265
2
I C 139 to 141