NEC V850/SB1TM User Manual page 19

Figure No.
7-10 Configuration of Interval Timer ......................................................................................................................188
7-11 Timing of Interval Timer Operation ................................................................................................................188
7-12 Control Register Settings in PPG Output Operation......................................................................................189
7-13 Control Register Settings for Pulse Width Measurement with Free-Running Counter and One Capture
Register .........................................................................................................................................................190
7-14 Configuration for Pulse Width Measurement with-Free Running Counter.....................................................191
7-15 Timing of Pulse Width Measurement with Free-Running Counter and One Capture Register
(with Both Edges Specified)...........................................................................................................................191
7-16 Control Register Settings for Measurement of Two Pulse Widths with Free-Running Counter.....................192
7-17 CRn1 Capture Operation with Rising Edge Specified ...................................................................................193
7-18 Timing of Pulse Width Measurement with Free-Running Counter (with Both Edges Specified) ...................193
7-19 Control Register Settings for Pulse Width Measurement with Free-Running Counter and Two Capture
Registers .......................................................................................................................................................194
7-20 Timing of Pulse Width Measurement with Free-Running Counter and Two Capture Registers
(with Both Edge Specified) ............................................................................................................................195
7-21 Control Register Settings for Pulse Width Measurement by Restarting ........................................................196
7-22 Timing of Pulse Width Measurement by Restarting (with Rising Edge Specified).........................................196
7-23 Control Register Settings in External Event Counter Mode ...........................................................................197
7-24 Configuration of External Event Counter .......................................................................................................198
7-25 Timing of External Event Counter Operation (with Rising Edge Specified) ...................................................198
7-26 Control Register Settings in Square Wave Output Mode ..............................................................................199
7-27 Timing of Square Wave Output Operation ....................................................................................................200
7-28 Control Register Settings for One-Shot Pulse Output with Software Trigger.................................................201
7-29 Timing of One-Shot Pulse Output Operation with Software Trigger ..............................................................202
7-30 Control Register Settings for One-Shot Pulse Output with External Trigger..................................................203
7-31 Timing of One-Shot Pulse Output Operation with External Trigger (with Rising Edge Specified) .................204
7-32 Start Timing of 16-Bit Timer Register n .........................................................................................................205
7-33 Timing After Changing Compare Register During Timer Count Operation....................................................205
7-34 Data Hold Timing of Capture Register...........................................................................................................206
7-35 Operation Timing of OVFn Flag.....................................................................................................................207
7-36 Block Diagram of TM2 to TM7 .......................................................................................................................210
7-37 TM2, TM3 Timer Clock Selection Registers 20, 21, 30, 31 (TCL20, TCL21, TCL30, and TCL31) ................213
7-38 TM4, TM5 Timer Clock Selection Registers 40, 41, 50, 51 (TCL40, TCL41, TCL50, and TCL51) ................214
7-39 TM6, TM7 Timer Clock Selection Registers 60, 61, 70, 71 (TCL60, TCL61, TCL70, and TCL71) ................215
7-40 8-Bit Timer Mode Control Registers 2 to 7 (TMC2 to TMC7).........................................................................217
7-41 Timing of Interval Timer Operation ................................................................................................................218
7-42 Timing of External Event Counter Operation (When Rising Edge Is Set)......................................................221
7-43 Square Wave Output Operation Timing ........................................................................................................222
7-44 Timing of PWM Output ..................................................................................................................................225
7-45 Timing of Operation Based on CRn0 Transitions ..........................................................................................226
LIST OF FIGURES (3/9)
Title
User's Manual U13850EJ4V0UM
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19