INTC accepted
CPU processing
134
CHAPTER 5
INTERRUPT/EXCEPTION PROCESSING FUNCTION
Figure 5-7. Maskable Interrupt Servicing
INT input
Mask?
No
PSW. ID = 0
Yes
Priority higher than
that of interrupt currently
serviced?
Yes
Priority higher
than that of other interrupt
request?
Yes
Highest default
priority of interrupt requests
with the same priority?
Yes
Maskable interrupt request
PSW. NP
0
PSW. ID
0
EIPC
Restored PC
EIPSW
PSW
ECR. EICC
Exception code
PSW. EP
0
PSW. ID
1
PC
Handler address
Interrupt servicing
User's Manual U13850EJ4V0UM
Yes
No
Interrupt enable mode?
No
No
No
Interrupt request pending
1
1
Interrupt request pending