NEC V850/SB1TM User Manual page 229

7.4.6 Cautions
(1) Error when the timer starts
The time until the match signal is generated after the timer starts has a maximum error of one clock. The reason
is the starting of 8-bit counter n (TMn) is asynchronous with respect to the count pulse.
Count pulse
TMn count value
Remark n = 2 to 7
(2) Operation after the compare register is changed while the timer is counting
If the value after 8-bit compare register n (CRn0) changes is less than the value of 8-bit timer register (TMn),
counting continues, overflows, and counting starts again from 0. Consequently, when the value (M) after CRn0
changes is less than the value (N) before the change, the timer must restart after CRn0 changes (n = 2 to 5).
Figure 7-48. Timing After Compare Register Changes During Timer Count Operation
Count pulse
CRn0
TMn count value
Remarks 1. N > X > M
2. n = 2 to 5
Caution Except when the TIn input is selected, always set TCEn = 0 before setting the stop state.
(3) TMn read out during timer operation
Since reading out TMn during operation occurs while the selected clock is temporarily stopped, select some high
or low level waveform that is longer than the selected clock (n = 2 to 7).
CHAPTER 7 TIMER/COUNTER FUNCTION
Figure 7-47. Start Timing of Timer n
00H 01H
↑
Timer starts
N
X − 1 X
User's Manual U13850EJ4V0UM
02H
03H 04H
M
FFH 00H 01H 02H
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