NEC V850/SB1TM User Manual page 234

32-bit single-chip microcontroller
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8.4 Operation
8.4.1 Operation as watch timer
The watch timer operates with time intervals of 0.5 seconds with the subsystem clock (32.768 kHz).
The watch timer generates an interrupt request at fixed time intervals.
The count operation of the watch timer is started when bits 0 (WTNM0) and 1 (WTNM1) of the watch timer mode
control register (WTNM) are set to 1. When these bits are cleared to 0, the 11-bit prescaler and 5-bit counter are
cleared, and the watch timer stops the count operation.
Setting the WTNM1 bit to 0 can clear the watch timer. An error of up to 15.6 ms may occur at this time.
Setting the WTNM0 bit to 0 can clear the interval timer. However, an error up to 0.5 sec. may occur after a watch
timer overflow (INTWTN) because the 5-bit counter is also cleared.
8.4.2 Operation as interval timer
The watch timer can also be used as an interval timer that repeatedly generates an interrupt at intervals specified
by a count value set in advance.
The interval time can be selected by bits 4 to 6 (WTNM4 to WTNM6) of the watch timer mode control register
(WTNM).
WTNM6
WTNM5
0
0
0
0
1
1
1
1
Remark
f
: Watch timer clock frequency
W
234
CHAPTER 8
Table 8-3. Interval Time of Interval Timer
WTNM4
Interval Time
0
0
2
0
1
2
1
0
2
1
1
2
0
0
2
0
1
2
1
0
2
1
1
2
User's Manual U13850EJ4V0UM
WATCH TIMER
f
= 32.768 kHz
W
4
× 1/f
W
5
× 1/f
W
6
× 1/f
W
7
× 1/f
W
8
× 1/f
W
9
× 1/f
W
10
× 1/f
W
11
× 1/f
W
488 µ s
977 µ s
1.95 ms
3.91 ms
7.81 ms
15.6 ms
31.2 ms
62.4 ms

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