NEC V850/SB1TM User Manual page 123

4.10 Memory Boundary Operation Condition
4.10.1 Program space
(1) Do not execute branch to the on-chip peripheral I/O area or continuous fetch from the internal RAM area to
peripheral I/O area.
continuously fetched and not fetched from external memory.
(2) A prefetch operation straddling over the on-chip peripheral I/O area (invalid fetch) does not take place if a branch
instruction exists at the upper-limit address of the internal RAM area.
4.10.2 Data space
Only the address aligned at the half-word boundary (when the least significant bit of the address is "0")/word
boundary (when the lowest 2 bits of the address are "0") boundary is accessed by data half-word (16 bits)/word (32
bits) long.
Therefore, access that straddles over the memory or memory block boundary does not take place.
For the details, refer to V850 Family User's Manual Architecture.
CHAPTER 4 BUS CONTROL FUNCTION
If branch or instruction fetch is executed nevertheless, the NOP instruction code is
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