NEC V850/SB1TM User Manual page 140

32-bit single-chip microcontroller
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Figure 5-11. Interrupt Control Register (xxICn) Format
After reset: 47H
R/W
Symbol
<7>
<6>
xxICn
xxIFn
xxMKn
xxIFn
0
Interrupt request not generated
1
Interrupt request generated
xxMKn
0
Enables interrupt servicing
1
Disables interrupt servicing (pending)
xxPRn2
xxPRn1
0
0
0
0
1
1
1
1
Note Automatically reset by hardware when interrupt request is acknowledged.
Remark xx: Identification name of each peripheral unit (WDT, P, WTNI, TM, CS, SER, ST, AD, DMA,
WTN, IIC, IEB, KR)
n:
Peripheral unit number (see Table 5-2)
140
CHAPTER 5
INTERRUPT/EXCEPTION PROCESSING FUNCTION
Address: FFFFF100H to FFFFF156H
5
4
0
0
Interrupt request flag
Interrupt mask flag
xxPRn0
0
0
Specifies level 0 (highest)
0
1
Specifies level 1
1
0
Specifies level 2
1
1
Specifies level 3
0
0
Specifies level 4
0
1
Specifies level 5
1
0
Specifies level 6
1
1
Specifies level 7 (lowest)
User's Manual U13850EJ4V0UM
3
2
1
0
xxPRn2
xxPRn1
Note
Interrupt priority specification bit
0
xxPRn0

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