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Figure 10-41. BRGMCn0 and BRGMCn1 Settings (Asynchronous Serial Interface Mode)
After reset: 00H
R/W
7
BRGMCn0
0
(n = 0, 1)
After reset: 00H
R/W
7
BRGMCn1
0
(n = 0, 1)
TPSn3
TPSn2
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
Caution If write is performed to BRGMCn0, n1 during communication processing, the output of
the baud rate generator is disturbed and communication will not be performed
normally. Therefore, do not write to BRGMCn0 and BRGMCn1 during communication
processing.
Remarks 1. f
XX
2. When the output of the timer is selected as the clock, it is not necessary to set the
P26/TO2/TI2 and P27/TO3/TI3 pins in the timer output mode.
CHAPTER 10
SERIAL INTERFACE FUNCTION
Address: FFFFF30EH, FFFFF31EH
6
5
0
0
Address: FFFFF320H, FFFFF322H
6
5
0
0
TPSn1
TPSn0
0
0
External clock (ASCKn)
0
1
f
XX
1
0
f
/2
XX
1
1
f
/4
XX
0
0
f
/8
XX
0
1
f
/16
XX
1
0
f
/32
XX
1
1
at n = 0: TM3 output
at n = 1: TM2 output
0
0
f
/64
XX
0
1
f
/128
XX
1
0
f
/256
XX
1
1
f
/512
XX
0
0
Setting prohibited
0
1
1
0
1
1
: Main clock oscillation frequency
User's Manual U13850EJ4V0UM
4
3
2
0
0
TPSn2
4
3
2
0
0
0
8-bit counter source clock selection
1
0
TPSn1
TPSn0
1
0
0
TPSn3
m
−
0
1
2
3
4
5
−
6
7
8
9
–
–
–
–
323
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