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(c) V850/SB1 ( µ µ µ µ PD703030A, 703030AY), V850/SB2 ( µ µ µ µ PD703036A, 703036AY)
Set the DRAn register to a value in the range of 0000H to 0FFFH or 2000H to 3FFFH (n = 0 to 5).
Setting is prohibited for values between 1000H to 1FFFH.
Figure 12-5. Correspondence Between DRAn Setting Value and Internal RAM (20 KB)
Cautions 1. Do not set odd addresses for 16-bit transfer (DCHCn register DSn = 1).
2. While the increment function is being used (DCHCn register DDADn = 0), if the DRAn
register value is set to 0FFFH, it will be incremented to 1000H, and will thus become a
setting-prohibited value.
Remark
The DRAn register setting values are in the parentheses.
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CHAPTER 12
xxFFFFFFH
Internal peripheral
I/O area
xxFFF000H
xxFFEFFFH
xxFFE000H
xxFFDFFFH
Internal RAM area
xxFFC000H
xxFFBFFFH
xxFFA000H
xxFF9FFFH
Access-prohibited
area
xxFF8000H
xxFF7FFFH
Expansion ROM area
User's Manual U13850EJ4V0UM
DMA FUNCTIONS
(DRAn setting value)
(0FFFH)
4 KB (usable for DMA)
(0000H)
(3FFFH)
8 KB (usable for DMA)
(2000H)
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