Evaluation Board Hardware; Setting Up The Evaluation Board; Sdp-H1 Controller Board; Power Supplies - Analog Devices EVAL-ADAQ23875FMCZ User Manual

EVAL-ADAQ23875FMCZ

EVALUATION BOARD HARDWARE

(OPTIONAL)
+3.3V
+V
S
GND
–V
S
ADA4899-1
(OPTIONAL)
+VS
VIN–
–VS
+5
ADG774
(OPTIONAL)
+VS
VIN+
–VS
ADA4899-1
(OPTIONAL)

SETTING UP THE EVALUATION BOARD

Figure 2 shows the simplified evaluation board block diagram
of the EVAL-ADAQ23875FMCZ connected to the
controller board. The board consists of one µModule (U1,
ADAQ23875), a choice of a 4.096 V reference (U5, LTC6655)
or 2.048V reference (U3, ADR4520), on-board power supplies
to derive the necessary supply rails using the
the ADP7118 (U4), the
800 MHz clock distribution IC (U13). The user also has an
option to use the A2 and A3 amplifiers, such as the
and the ADG774
SDP-H1 CONTROLLER BOARD
The EVAL-ADAQ23875FMCZ evaluation board uses an SPI
interface and is connected to the high speed controller board
for the system demonstration platform (SDP-H1) controller board.
The SDP-H1 board requires power from a 12 V wall adapter. The
SDP-H1 has a Xilinx® Spartan 6 and an
with connectivity to the PC through a USB 2.0 high speed port.
The controller boards allow the configuration and capture of
data on the daughter boards from the PC via a USB.
The SDP-H1 has an FMC low pin count (LPC) connector with
full differential LVDS and singled-ended LVCMOS support. It
also features the 160-pin connector, found on the SDP-B, which
exposes the Blackfin® processor peripherals. This connector
provides a configurable serial, parallel I
purpose input/output (GPIO) communications lines to the
attached daughter boar for the functional description of the
on-board power supplies.
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User Guide
+VS/PDB_AMP/MODE
VS+
2.048V
REFERENCE
0.1µF
1.3pF
1.1kΩ
550Ω
IN–
VCMO
FDA
IN+
550Ω
1.1kΩ
0.1µF
1.3pF
PDB_AMP VS– MODE
EVAL-ADAQ23875FMCZ
LTM8049
ADP7183 (U7), the LT3023
(U2), when evaluating the ADAQ23875.
ADSP-BF527
2 C and SPI, and general-
POWER SUPPLY CIRCUITRY
–VS –2.5V
ADP7183
(–2V)
+7V
LTM3023
(+6.5V)
+VDD
(+5V)
+VIO
ADP7118
(+2.5V)
REFIN VCMO REFBUF VDD
0.1µF 0.1µF
0.5
2
10µF
15kΩ 0.1µF
0.1µF
82pF
25Ω
16-BIT, 15MSPS ADC
25Ω
82pF
GND ADCIN+ ADCIN– PDB_ADC
Figure 2. Simplified Evaluation Block Diagram

POWER SUPPLIES

By default, all necessary supply rails on the EVAL-
SDP-H1 ADAQ23875FMCZ are powered by a 3.3 V rail coming from the
SDP-H1
from an external 3.3 V supply applied using the JP9 solder link if
desired (see Table 2). The EVAL-ADAQ23875FMCZ positive
(U6), rails, 7 V (+VS), 5 V (VDD), and 2.5 V (VIO), are generated
(U8), and a from a combination of the power µModule, U6 (LTM8049), U4
(ADP7118-2.5), and a dual output LDO, U8 (LT3023). The EVAL-
ADA4899-1 ADAQ23875FMCZ negative rail, −2.0 V (−VS), is generated by a
combination of the power µModule, U6 (LTM8049), and U7
(ADP7183). Each supply rail includes necessary decoupling
capacitors placed closed to the device. A single ground plane is
used on this board to minimize the effect of high frequency
noise interference.
Table 1. On-Board Power Supplies
Power Supply (V)
processor
+7.5, −2.5
+7 (default)
−2 (default)
+2.5
+5
Rev. 0 | Page 3 of 26
LTM8049
+12V
+3.3V
VIO
LVDS INTERFACE
CNV+, CNV–
DA+/DA–, DB+/DB–
DCO+, DCO–
ADSP-BF527
CLK+, CLK–
SERIAL LVDS
INTERFACE
160-PIN FMC
CONNECTOR
board. The EVAL-ADAQ23875FMCZ can be powered
Function
Supply rails using the
VS+ rail using the
1 VS− rail using the
VIO rail using the
VDD rail using the
UG-1896
12V
WALL WART
USB PORT
POWER
SUPPLY
CIRCUITRY
SPARTAN-6
FPGA
XC6SLX25
EVAL-SDP-CH1Z
LTM8049
LT3023
ADP7183
ADP7118
LT3023