Avnet SMARC MSC SM2S-IMX8MINI User Manual page 36

•
Master/Slave configurable
• Two Chip Select (CS) signals to support multiple peripherals
•
Transfer continuation function allows unlimited length data transfers
• 32-bit wide by 64-entry FIFO for both transmit and receive data
•
Polarity and phase of the Chip Select (CS) and SPI Clock (SCLK) are configurable
• Direct Memory Access (DMA) support
Pin
Signal Signal Level
Type
SPI0_DIN I 1.8V CMOS
SPI0_DO O PP 1.8V CMOS
SPI0_CK O PP 1.8V CMOS
SPI0_CS0# O PP 1.8V CMOS
SPI0_CS1# O PP 1.8V CMOS
SPI1_DIN I 1.8V CMOS
SPI1_DO O PP 1.8V CMOS
SPI1_CK O PP 1.8V CMOS
SPI1_CS0# O PP 1.8V CMOS
SPI1_CS1# O PP 1.8V CMOS
*
NOTE: SPI[0:1] are not available if CAN[0:1] interfaces are implemented on the module.
MSC SM2S-IMX8MINI
User Manual
Table 12: SPI Signal Description
Pin on Pin name on
i.MX8M Mini i.MX8M Mini
A7 ECSPI1_MISO
B7 ECSPI1_MOSI
D6 ECSPI1_SCLK
B6 ECSPI1_SS0
AD22 SAI2_TXC
A8 ECSPI2_MISO
B8 ECSPI2_MOSI
E6 ECSPI2_SCLK
A6 ECSPI2_SS0
AC22 SAI2_TXD0
Power
PU/PD Description
Tolerance
1.8V Master Input Slave Output
1.8V Master Output Slave Input
1.8V Clock Output
1.8V PU 10k 1.8V Chip-Select 0
1.8V PU 10k 1.8V Chip-Select 1 (GPIO4_IO25)
1.8V Master Input Slave Output
1.8V Master Output Slave Input
1.8V Clock Output
1.8V PU 10k 1.8V Chip-Select 0
1.8V PU 10k 1.8V Chip-Select 1 (GPIO4_IO26)
*
*
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