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A75
LVDS_A2+
A76
LVDS_A2-
A77
LVDS_VDD_EN
A78
LVDS_A3+
A79
LVDS_A3-
A80
GND_11
A81
LVDS_A_CK+
A82
LVDS_A_CK-
A83
LVDS_I2C_CK
A84
LVDS_I2C_DAT
A85
SDIO_D3 / GPI3
A86
KBD_RST#
A87
KBD_A20GATE
A88
PCIE0_CK_REF+
A89
PCIE0_CK_REF-
A90
GND_12
A91
RSVD1
A92
RSVD2
A93
SDIO_Clk / GPO0
A94
RSVD3
A95
RSVD4
A96
GND_13
A97
VCC_12V_1
A98
VCC_12V_2
A99
VCC_12V_3
A100
GND_14
A101
VCC_12V_4
A102
VCC_12V_5
A103
VCC_12V_6
A104
VCC_12V_7
A105
VCC_12V_8
A106
VCC_12V_9
A107
VCC_12V_10
A108
VCC_12V_11
A109
VCC_12V_12
A110
GND_15
24
LVDS Channel A (positive)
LVDS Channel A
(negative)
LVDS Panel Power Control
LVDS Channel A (positive)
LVDS Channel A
(negative)
Power Ground
LVDS Channel A Clock+
LVDS Channel A Clock-
LVDS I2C Clock (DDC)
LVDS I2C Data (DDC)
SDIO# Data3 / General
Purpose Input 3
Keyboard Reset
A20 gate
PCIe Clock (positive)
PCIe Clock (negative)
Power Ground
Reserved
Reserved
SDIO#0 Clock / General
Purpose Output 0
Reserved
Reserved
Power Ground
12V VCC
12V VCC
12V VCC
Power Ground
12V VCC
12V VCC
12V VCC
12V VCC
12V VCC
12V VCC
12V VCC
12V VCC
12V VCC
Power Ground
nanoETXexpress-SP/Specification
DP-O
PU 50R inUS15W
DP-O
PU 50R inUS15W
O-3.3
PD 100k
DP-O
PU 50R inUS15W
DP-O
PU 50R inUS15W
PWR
-
DP-O
PU 50R inUS15W
DP-O
PU 50R inUS15W
IO-3.3
PU 10k 3.3V
IO-3.3
PU 10k 3.3V
I/O-3.3 / I-3.3
PU 75k in
US15W / PU 100k
3.3V
I-5T
PU 1M 3.3V
I-5T
PU 10k 3.3V
DP-O
-
DP-O
-
PWR
-
nc
-
nc
-
O-3.3 / O-3.3
- / PD 100k
nc
-
nc
-
PWR
-
PWR
-
PWR
-
PWR
-
PWR
-
PWR
-
PWR
-
PWR
-
PWR
-
PWR
-
PWR
-
PWR
-
PWR
-
PWR
-
PWR
-
-
-
-
-
-
-
-
-
-
-
- / CPLD I/O
not supported
on CE 1.x.x
-
100MHz
100MHz
-
-
-
24/48MHz /
CPLD I/O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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