Table of Contents
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LEDs
diagram of locations, 1-3,
LED10 (power), 1-8,
LED1-8 (general-purpose IO), 1-15,
2-14
LED9 (processor reset), 1-8,
ZLED3 (USB monitor), 1-8,
license restrictions,
1-11
loop-back test switch (SW11),
M
master input clock (MCLK), 1-13,
memory bus (AD15-0),
N
notation conventions,
xvii
O
oscillators, 1-13,
2-3
P
package contents,
1-2
parallel flash memory, See flash memory
parallel port (PP)
boot mode, 2-3,
2-12
connections, 1-12, 1-15,
control signals,
2-7
PMCTL register,
2-3
power
connector (J7),
2-18
LED (LED10),
2-14
supply, 1-2,
2-19
PPFLG bits, 1-12,
1-15
push buttons
See also switches by name (SWx)
diagram of locations, 1-14,
ADSP-21364 EZ-KIT Lite Evaluation System Manual
2-13
2-14
2-14
2-14
2-13
2-5
2-3
2-3
2-13
R
R79-80 resistors,
2-2
RCA connectors, xi, 1-14,
related documents,
xvii
reset
processor (LED9),
2-14
push button (SW5),
restrictions, of the licence,
S
sample rates,
1-13
schematic, of ADSP-21364 EZ-KIT Lite,
B-1
serial peripheral interface, See SPI
signal routing units (SRUs), 1-13,
S/PDIF
connectors (J8-9),
2-19
receivers,
1-13
SPI
connections,
2-6
disable switch (SW8),
flash memory, 1-12, 2-6,
header (P2),
2-19
master boot mode, 2-3,
port, 1-12,
1-14
slave boot mode,
2-12
SRAM
configuration,
1-12
via parallel port,
2-3
startup, of this EZ-KIT Lite,
CCES,
1-4
SW10 (boot mode/clock ratio) switch, 2-3,
2-12
SW11 (loop-back test) switch,
SW1-2 (FLAG1-2) push buttons, 1-15,
2-7, 2-11,
2-15
SW3-4 (DAI19-20) push buttons, 1-15,
2-11,
2-15
SW5 (reset) push button,
Index
2-5
2-15
1-11
2-4
2-11
2-7
2-12
1-8
2-13
2-15
I-3
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