Analog Devices ADSP-21364 EZ-KIT Lite Manual page 77

Evaluation system
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Index
conventions, manual,
xvii
core
clock rates,
2-12
frequency,
2-3
to CLKIN ratios,
2-12
voltage,
2-2
D
DAI
block diagram,
2-4
connections, 2-10,
2-11
header (P3),
2-20
DAI_P17 pins,
2-10
DAI_P19-20 (SW3-4) pins, 1-15, 2-11,
2-15
DAIP6 pins,
2-10
default configuration, of this EZ-KIT Lite,
1-3
digital audio interface, See DAI
digital-to-analog converters (DACs), See
AD1835A
DIP switch SW9, 1-3, 1-14,
E
electret microphone, 1-14,
evaluation license
CCES,
1-10
example programs,
1-16
expansion interface, 2-4, 2-6, 2-7,
external memory,
1-12
F
features, of this EZ-KIT Lite,
FLAG0 (SPI flash) pins, 1-12, 2-6,
FLAG1 (SW1/SPI) pins, 1-15, 2-7, 2-11,
2-19
I-2
2-11
2-9
2-17
x
2-7
ADSP-21364 EZ-KIT Lite Evaluation System Manual
FLAG2 (SW2) pins, 1-15, 2-7,
FLAG3 (AD1835A select) pins, 1-14, 2-6,
2-7
FLAG registers, 1-14,
2-14
flash memory
boot mode (default),
start/end addresses,
1-12
via parallel port, 1-12,
frame sync/clock signals, 1-13,
frequency,
2-3
G
general-purpose IO pins, 1-14, 1-15, 2-3,
2-6, 2-14,
2-15
H
headphone jack (J6), xi,
I
installation, of this EZ-KIT Lite,
CCES,
1-4
internal boot mode,
2-12
IO
sample rates,
1-13
voltage,
2-2
J
JTAG
connector (ZP4),
2-21
emulation port,
2-8
L
latch-enable pin (ALE), 1-15, 2-3,
LED_CS signals,
2-11
2-11
2-12
2-3
2-10
2-18
1-8
2-11

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