Analog Audio - Analog Devices ADSP-21364 EZ-KIT Lite Manual

An example program is included in the EZ-KIT Lite installation directory
to demonstrate how the parallel port and SPI port can be configured to
access the memories.

Analog Audio

The AD1835A is a high-performance, single-chip codec featuring four ste-
reo digital-to-analog converters (DAC) for audio output and one stereo
analog-to-digital converters (ADC) for audio input. The codec can input
and output data with a sample rate of up to 96 kHz on all channels. A
192 kHz sample rate can be used with the one of the DAC channels.
The processor interfaces with the AD1835A codec via the DAI port. The
DAI interface pins can be configured to transfer serial data from the
AD1835A codec in either time-division multiplexed (TDM) or 2-wire
interface (TWI) mode. For more information on how the AD1835A con-
nects to the DAI, see
The master input clock (
on-board 12.288 MHz oscillator or can be supplied by one of the DAI
pins of the processor. Using one of the pins to generate the
opposed to the on-board oscillator, allows synchronization of multiple
devices in the system. This is done on the EZ-KIT Lite when data is com-
ing from the S/PDIF receiver and being output through the audio codec.
The S/PDIF
MCLK
routing unit (SRU). It is also necessary to disable the on-board audio
oscillator from driving the audio codec and the processor's input pin. For
instructions on how to configure the clock, refer to
(SW7)" on page
The AD1835A codec can be configured as a master or as a slave, depend-
ing on the DIP switch settings. In master mode, the AD1835A drives the
serial port clock and frame sync signals to the processor. In slave mode,
the processor must generate and drive all of the serial port clock and frame
ADSP-21364 EZ-KIT Lite Evaluation System Manual
Using the ADSP-21364 EZ-KIT Lite
"DAI Interface" on page
) for the AD1835A can be generated by the
MCLK
is routed to the AD1835A
2-10.
2-4.
MCLK
in the processor's signal
MCLK
"Codec Setup Switch
, as
1-13