Switch Settings
Codec Setup Switch (SW7)
The codec setup switch (
codec and can setup the communication protocol of the codec.
Positions 1 and 2 determine the clock routing for the audio oscillator to
the codec and to the processor.
positions 1 and 2 connect on the board. In the default position, route the
pin to
DAI_P17
AD SP-21364 Processor
D AI_P6
DAI_P17
Figure 2-5. Audio Clock Routing
Position 3 of the
or is a slave. If the AD1835A is a master, the device's serial interface gen-
erates the frame sync and clock signals necessary to transfer data. When
the device is a slave, the processor must generate the frame sync and clock
signals. By default, position 3 is
trol signals.
Position 4 of
SW7
interface. This is useful when the DAI interface connects to another
device.
2-10
) can re-route signals going to the AD1835A
SW7
Figure 2-5
(in software) to clock the AD1835A.
DAIP6
SW 7.1
SW 7.2
switch determines if the AD1835A device is a master
SW7
ON
disconnects the AD1835A's
ADSP-21364 EZ-KIT Lite Evaluation System Manual
illustrates how the switch
AD1835A C odec
M CLK
12.288 MH z
OSC
, and the AD1835A generates the con-
ADC_DATA
pin from the DAI
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