Resetting /Waking Up The Development Board; Ethernet Port Power State; Resetting The Board; Npor - Cirrus Logic ARM CDB89712 User Manual

3.8 RESETTING /WAKING UP THE DEVELOPMENT BOARD

There are several momentary signals that are used to either reset or wakeup the development board.

3.8.0.1. Ethernet Port power state

The Ethernet port has a software initiated power down state that is independent of the ARM core.
3.8.1

Resetting the Board

There are three asynchronous reset signals supported by the CS89712:
l

nPOR

l

nURESET

l
nPWRFL.
Here is a brief description of the reset signals:
3.8.1.1. nPOR
This signal is the initial reset signal and is only activated when power is first applied to the board.
The development board implements this signal with a simple resistor and capacitor network with a
time constant of approximately 10mS. In addition, a momentary switch labeled POR is available to
implement control of this signal. Note that a power-on-reset will also reset the RTC.
3.8.1.2. nURESET
User reset; this input resets the ARM processor without resetting many of the registers initalized by
nPOR. (See the CS89712 data sheet for a complete description.) nURESET allows the system to be
initialized from an external source, such as a watchdog timer or the user. On the CDB89712,
nURESET is activated with a momentary switch labeled RESET located at the front of the board.
DS502UM2

Figure 3-2. CS89712 Operating States

CDB89712
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