Quectel EM06 Series Manual page 36

The module supports 16-bit linear data format. The following two figures show respectively the timing
relationship between 8 kHz PCM_SYNC and 2048 kHz PCM_CLK in the primary mode and that between
8 kHz PCM_SYNC and 256 kHz PCM_CLK in the auxiliary mode.
P CM _CLK
P CM _SY NC
P CM _OUT
P CM _IN
P CM _CLK
P CM _SY NC
P CM _OUT
P CM _IN
EM06_Series_Hardware_Design
125 us
1 2
MS B
MS B
Figure 19: Primary Mode Timing
125 us
1 2
MS B
MS B
Figure 20: Auxiliary Mode Timing
EM06 Series Hardware Design
2 5 5 2 5 6
MS B
LS B
MS B
LS B
31 32
LS B
LS B
LTE-A Module Series
35 / 69