Pcm And I2C Interfaces - Quectel EM06 Series Manual

Hide thumbs Also See for EM06 Series:
Table of Contents

Advertisement

In order to ensure the integrity of signal of USB 2.0 data line, the resistors R1, R2, R3 and R4 must be
placed close to the module and to each other.
In order to ensure the compatibility of your USB interface design with the USB 2.0 specifications, please
comply with the following principles:
Route the USB 2.0 signal traces as a differential pair with total grounding.
For USB 2.0 routing traces, the trace impedance of the differential pair should be 90 Ω, and the trace
length difference between the pair should be less than 2 mm.
Do not route signal traces under crystals, oscillators, magnetic devices or RF signal traces. Route the
USB 2.0 differential traces in the inner-layer, and surround the traces with grounds on the same and
adjacent layers.
If a USB connector is used, keep the ESD protection components as close to it as possible. Pay
attention to the influence of junction capacitance of ESD protection components on USB 2.0 data
traces. The capacitance value of ESD protection components should be lower than 2.0 pF for USB
2.0.
If possible, reserve a 0 ohm resistor on USB_DP and USB_DM lines respectively.
NOTE
S
"*" means under development.

3.9. PCM and I2C Interfaces

EM06 series modules support audio communications via Pulse Code Modulation (PCM) digital interface
and I2C interface.
The PCM interface supports the following modes:
Primary mode (short frame synchronization): the module works as both master and slave.
Auxiliary mode (long frame synchronization): the module works as master only.
In the primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the
rising edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports
256, 512, 1024 or 2048 kHz PCM_CLK at 8 kHz PCM_SYNC, and also supports 4096 kHz PCM_CLK at
16 kHz PCM_SYNC.
In the auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the
rising edge. The PCM_SYNC rising edge represents the MSB. In this mode, PCM interface operates with
a 256 kHz PCM_CLK and an 8 kHz, 50 % duty cycle PCM_SYNC only.
EM06_Series_Hardware_Design
LTE-A Module Series
EM06 Series Hardware Design
34 / 69

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents