Quectel EM06 Series Manual page 33

When AT+QSIMDET=1, 1 is set, the timing of hot plugging is illustrated by the following figure.
USIM_ DET
USIM_ VDD
USIM_ DATA
USIM_ CLK
USIM_ RST
Notes:
1. ta is the time interval between USIM_VDD HIGH level and USIM_CLK HIGH level.
2. tb is the time interval between USIM_VDD HIGH level and USIM_DATA HIGH level.
3. tc is the time interval between USIM_RST HIGH level and answer on USIM_DATA.
To enhance the reliability and usibility of the (U)SIM card in your applications, please follow the principles
below in (U)SIM circuit design:
⚫
Place the (U)SIM card connector as close to the module as possible. Keep the trace length within
200 mm, the shorter the better.
⚫
Keep (U)SIM card signals away from RF and VCC traces.
⚫
Ensure the ground traces between the module and the (U)SIM card connector are short and wide.
Keep the trace width of ground and USIM_VDD no less than 0.5 mm to maintain the same electric
potential.
⚫
To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and
shield them with surrounded ground.
⚫
In order to offer good ESD protection, it is recommended to add a TVS diode array with parasitic
capacitance not exceeding 10 pF. The 22 ohm resistors should be added in series between the
module and the (U)SIM card connector so as to suppress EMI spurious transmission and enhance
ESD protection. The 33 pF capacitors are used to filter out RF interference. Please note that the
(U)SIM peripheral circuit should be close to the (U)SIM card connector.
⚫
The pull-up resistor on the USIM_DATA line can improve anti-jamming capability in sensitive
occasions or when long traces are applied and should be placed close to the (U)SIM card connector.
EM06_Series_Hardware_Design
450 ms
tb ta + 5 2 u s
ta 1.5 ms
Figure 17: Timing of Hot Plugging
EM06 Series Hardware Design
0.1 ms tc
21.7 ms
LTE-A Module Series
10 ms
ATR
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