Sr865A Specifications - Stanford Research Systems SR865A Operation Manual

SR865A Specifications

Signal Channel
Voltage Inputs
Sensitivity (Output Scale)
Input Impedance
Input Range
Gain Accuracy
Input Noise
CMRR
Harmonic Distortion
Dynamic Reserve
Current Input Ranges
Reference Channel
Frequency Range
Timebase
Ext TTL Reference
Ext Sine Reference
Ext Reference Input Impedance 1 MΩ or 50 Ω
Acquisition Time
Phase Setting Resolution
Phase Noise
Phase Drift
Harmonic Detect
Dual F Reference
Chopper Reference
Demodulator
dc Stability
Time Constants
Low Pass Filters
Filter Slope
Synchronous Filter
Harmonic Rejection
Low Latency Output
Internal Oscillator
Frequency
Frequency Accuracy
External Timebase
Frequency Resolution
Single-ended (A) or differential (A−B)
1 nV to 1 V (voltage input)
1 fA to 1 μA (current input)
10 MΩ+25 pF, ac (>1 Hz) or dc coupled
10 mV to 1 V (peak); max input before overload
1% below 200 kHz and 2% to 4 MHz (signal amplitude <30% of input range)
2.5 nV/√Hz above 1 kHz, 10 mV input range (typical)
Greater than 90 dB at 1 kHz (dc Coupled)
−80 dB below 100 kHz, −60 dB above 100 kHz
Greater than 120 dB
1 μA or 10 nA
1 mHz to 4 MHz
10 MHz In/Out phase locks the internal frequency to other SR865A units
Minimum 2 V logic level, rising or falling edge
400 mV pk–pk minimum signal, ac coupled (>1 Hz)
(2 cycles + 5 ms) or 40 ms, whichever is greater
32
360/2 deg
Ext TTL reference: <0.001° rms at 1 kHz, (100 ms, 12 dB/oct) (typical)
Internal reference: <0.0001° rms at 1 kHz (100 ms, 12 dB/oct)
Sine Out to Signal In (200 mVrms)
<0.002°/°C below 20 kHz (dc coupled input)
<0.02°/°C below 200 kHz
<0.2°/°C below 2 MHz
Detect at N×f where N≤99 and N×f
ref
Detect at f = | f − f
dual int ext
All frequencies less than 4 MHz for specified performance
SR865A drives SR540 Chopper (via Aux Out 4) to lock the chopper to f
Digital output values have no offset drift
1 μs to 30 ks
Typical RC type filters or Advanced Gaussian/Linear Phase filters
6, 12, 18, 24 dB/oct rolloffs
Available below 4 kHz
−80 dB
Rear panel BlazeX output with <2 μs delay (plus low pass filter rise/fall times)
1 mHz to 4 MHz
25 ppm + 30 μHz with internal timebase
10 MHz timebase input/output on rear panel
6 digits or 0.1 mHz, whichever is greater
<4 MHz
ref
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SR865A DSP Lock-in Amplifier
Specifications
int
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