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Appendix H
Circuit Description
This appendix provides a brief orientation to the signal interface and power supply
portions of the SR865A electronics. The FPGA-based motherboard is beyond the scope
of this documentation, and servicing or other detailed hardware questions should be
referred to the factory.
Signal Input Amplifier
The SR865A signal input module contains both the differential voltage preamplifier and
the current input preamplifier. Steering relays set the input configuration, including
grounding, ac coupling, and differential or single ended mode. Most relays are of the
latching type, requiring only a short pulse to switch states. Relays K102 and K106 are
single-side stable, however, and are (separately) energized to select the voltage
preamplifier low-gain, or current preamplifier active, respectively.
The voltage input preamplifier uses a cascoded JFET input stage with transistors Q202
and Q101, with feedback provided by U202 and resistors R223, R224, and R225, R226,
R230, R231, R293, R294. The current input preamplifier is built with transimpedance
gain of 10
differential summing junctions for U204, which also provides CMRR trimming for the
voltage preamp front-end. Programmable gain blocks around U402 and U404 implement
the SR865A Input Range setting, with U406 driving the rear panel Signal Mon after all
programmable gain is added. The main analog signal is driven differentially through
R428 and R429 to the shielded twisted pair interconnect J401 leading to the motherboard.
Level translators U501A, U502A, U503A, and U504A support overload window
comparator circuits, while the differentiators U501B, U502B, and U503B allow for slew
rate overload detection. U601 through U603 all perform overload detection, wire-or'ing
into buffer U611/U610 for monitoring by the motherboard. Chip selects, clock gating,
and relay control is implemented with U701–U709. Analog power for the signal
amplifiers is re-regulated from the main power supply ±16V to ±15V with U710/U711
low noise, low drop-out regulators.
External Reference Input
The reference input module provides signal conditioning for sine and TTL mode external
reference inputs for the digital phase-locked loop of the SR865A. Input impedance and
signal type (sine or TTL) is selected by steering relays K101 and K102, and analog
switch U108. The TTL path is dc coupled and discriminated directly with comparator
U102, with transition threshold set at +1V. The polarity (rising or falling edge) is selected
by U104. The sine path is ac coupled with a 1 s time constant at C117/R132, and buffered
by U106. Threshold trimming from U115 is added through R192 before further
6
8
V/A or 10
V/A (R305 or R302). dc offset voltage trim is injected at the fully
Circuit Description
SR865A DSP Lock-in Amplifier
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