Advanced Chipset Features Page - VIA Technologies VT82C686A User Manual

Hide thumbs Also See for VT82C686A:
Table of Contents

Advertisement

Advanced Chipset Features Page

This page sets some of the parameters of the mainboard
components including the memory, and the system logic.
CMOS Setup Utility – Copyright (C) 1984 – 2000 Award Software
Advanced Chipset Features
Bank 0/1 DRAM Timing
Bank 2/3 DRAM Timing
SDRAM Cycle Length
DRAM Clock
Memory Hole
P2C/C2P Concurrency
Fast R-W Turn Around
System BIOS Cacheable
Video RAM Cacheable
OnChip AGP VGA
Frame Buffer Size
AGP Aperture Size
AGP-4X Mode
AGP Driving Control
xAGP Driving Value
OnChip USB
USB Keyboard Support
OnChip Sound
    : Move
Enter : Select
F5:Previous Values
Bank 0/1 2/3
This item allows you to select the timing for the
DRAM slots, depending on whether the board has
DRAM Timing
paged SDRAMs.
SDRAM Cycle
This field enables you to set the CAS latency time
in HCLKs of 2/2 or 3/3. The system board
Length
designer should have set the values in this field,
depending on the DRAM installed. Do not change
the values in this field unless you change
specifications of the installed DRAM or the
installed CPU.
DRAM Clock
Enables the user to select the DRAM Clock.
Memory Hole
This item can be used to reserve memory space
for some ISA expansion cards that require it.
P2C/C2P
When disabled, the CPU bus is occupied during
the entire PCI operation period.
Concurrency
3: BIOS Setup Utility
SDRAM 8/10ns
SDRAM 8/10ns
3
Menu Level
Host CLK
Disabled
Enabled
Disabled
Enabled
Enabled
Enabled
8M
64M
Enabled
Auto
DA
Enabled
Disabled
Auto
+/-/PU/PD:Value:
F10: Save ESC: Exit
F6:Fail-Safe Defaults
F7:Optimized Defaults
Item Help
F1:General Help
29

Advertisement

Table of Contents
loading

This manual is also suitable for:

Vt82c694x

Table of Contents