External / Internal Dsp Reset Selection Jumper, Jp2; External/Internal Voltage Reference Selection Jumpers, Jp3 And Jp4; Pwm Trip Jumper, Jp5; Pwm Switched Reluctance Mode Jumper, Jp6 - Analog Devices ADSP-21992 EZ-KIT LITE Manual

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4.3.3 External / Internal DSP Reset Selection Jumper, JP2

JP2 enables you to select the source of reset for the ADSP-21992. When JP2 is in the 1-2
position, the ADSP-21992 can be reset from 3 external sources: pushbutton switch (S1) the
external power-on reset IC (ADM708), or through the USB interface circuitry on the ADSP-
21992 EZ-KIT Lite board. If JP2 is in the 2-3 position, the power-on reset (POR) of the ADSP-
21992 is directly connected to the reset pin of the ADSP-21992. The 1-2 position is the default
and recommended configuration when using the VisualDSP++ development tools.

4.3.4 External/Internal Voltage Reference Selection Jumpers, JP3 and JP4

The configuration of two jumpers, JP3 and JP4, is required to control the selection of the ADSP-
21992's internal voltage reference or the provided external voltage reference on the ADSP-21992
EZ-KIT Lite board. The appropriate settings for the jumpers to select internal or external voltage
reference operation are:
INTERNAL Reference:
EXTERNAL Reference:
Please see section

4.3.5 PWM Trip Jumper, JP5

Connecting jumper JP5 in the 2-3 position ties the
via a 4.7KΩ resistor and enables the PWM outputs. In this case, the
21992 can be defined by external circuitry via the PWM connector, P10. Alternatively,
connecting jumper JP5 in the 1-2 position connects the
GND, thereby permanently disabling the PWM outputs. A third alternative is to leave JP5
unconnected. Again, in this case, the
connector, P10, so that its value can be defined by external circuitry.

4.3.6 PWM Switched Reluctance Mode Jumper, JP6

Connecting JP36 in the 2-3 position ties the
disables the PWM switched reluctance mode. Alternatively, connecting JP6 in the 1-2 position
ties the
PWMSR
mode.

4.3.7 PWM Polarity Jumper, JP7

Connecting JP7 in the 2-3 position ties the
active HI PWM outputs. Alternatively, connecting JP7 in the 1-2 position creates active LO
PWM outputs from the ADSP-21992. The appropriate setting for this jumper is determined by the
exact nature of the gate drive circuit of the target system. A third alternative is to leave JP5
unconnected. In this case, its state can be determined by external hardware.
ADSP-21992 EZ-KIT Lite Evaluation System Manual
4.2.4
for more details on voltage reference operation.
PWMTRIP
pin of the ADSP-21992 to GND and enables the PWM switched reluctance
JP3 in position 1-2, JP4 open
JP3 in position 2-3, JP4 closed
pin of the ADSP-21992 to +3.3V
PWMTRIP
PWMTRIP
pin of the ADSP-21992 is connected to the PWM
PWMSR
pin of the ADSP-21992 to +3.3V and
pin of the ADSP-21992 to +3.3V and enables
PWMPOL
pin of the ADSP-
PWMTRIP
pin of the ADSP-21992 to
4-37

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