Altera Cyclone III FPGA Reference Manual page 10

Board Overview
Figure 2–1. Top View of the Cyclone III FPGA Starter Board
2.5 V I/O Power
Measurement (JP3)
DC Power
Input (J2)
Power Switch
(SW1)
16-Mbyte
Parallel
Flash (U6)
USB
Connector
(J3)
Flash LED
USB
UART (U8)
JTAG Header (J4)
32-Mbyte
DDR SDRAM (U4)
2–2
Cyclone III FPGA Starter Board
Figure 2–1 shows the top view of the Cyclone III FPGA starter board.
1-Mbyte SSRAM (U5)
Reconfigure
and Reset
Push Buttons
User LEDs
50-MHz
System Clock
Reference Manual
FPGA Core Power
Measurement (JP6)
User Push Button Switches
HSMC
Connector (J1)
Cyclone III Device (U1)
Configuration Done LED
Altera Corporation
October 2007