Altera Cyclone III FPGA Reference Manual page 12

Board Overview
Table 2–1. Cyclone III FPGA Starter Board (Part 1 of 2)
Component/
Type
Interface
Featured Device
FPGA Cyclone III
device
User Interfaces
I/O Push-button
switches
I/O LEDs
Connections & Interfaces
I/O USB UART
Input HSMC
Connector
Configuration & Reset
Input JTAG header
Input USB
connector
Display Configuration
done LED
Memory
Flash 16 Mbytes of
parallel flash
memory
Display Flash LED
SSRAM 1 Mbyte
high-speed
SSRAM
DDR SDRAM 32-Mbyte
DDR SDRAM
2–4
Cyclone III FPGA Starter Board
Table 2–1 describes the components and lists their corresponding board
references.
Board Reference
U1
Button1–Button4, CPU
Reset, Reconfigure
LED1–LED4,
Conf_Done, Link,
Power, Flash_CEN,
Load
U8
J1
J4
J3
Conf_Done
U6
U5
U4
Reference Manual
Description
EP3C25F324-C8, 324-pin FineLine BGA
(FBGA) package
Four push-button switches for user-defined,
logic inputs.
Four user-defined LEDs
USB interface to the Cyclone III device for
external FPGA configuration and
communication with applications running on
the FPGA.
Header for connecting the HSMC interface.
Jumper header to select which JTAG source
the board uses, i.e., the JTAG header
configuration or the USB JTAG configuration.
Type B USB Connector that allows for
connecting a Type A-B USB cable between a
PC and the board.
LED that illuminates when FPGA is
successfully configured.
16 Mbytes of non-volatile memory.
LED that illuminates when the flash is being
accessed.
256K x 32 synchronous SRAM
4M x16 x 4 DDR SDRAM
Page
2–5
2–13
2–14
2–8
2–9
2–8
2–8
2–14
2–16
N/A
2–20
2–18
Altera Corporation
October 2007