Lattice Semiconductor POWR607 User Manual page 17

POWR6AT6
The POWR6AT6 device (ispPAC-POWR6AT6) on the board provides power supply margin and trim functions, ana-
log input monitoring with an embedded 10-bit ADC in a 5x5 mm quad flat-pack package.
Table 13. POWR6AT6 Reference
Reference Designators
Part Number
Manufacturer
Web Site
Table 14. ispPAC-POWR6AT6 Pin Information
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Item
U3
ispPAC-POWR6AT6-01-SN32I
Lattice Semiconductor
www.latticesemi.com
Pin Function
TDO
VCCJ
TCK
TDI
TMS
CLTENb
VPS0
VPS1
CLTLOCK/SMBA
SCL
SDA
VCCD
VCCA
VMON1GS
VMON1
VMON2GS
VMON2
VMON3GS
VMON3
VMON4GS
VMON4
VMON5GS
VMON5
VMON6GS
VMON6
TRIM6
TRIM5
TRIM4
TRIM3
TRIM2
TRIM1
GND
POWR607/6AT6 Evaluation Board
Description
Board Connection Processor
17
Support Demo
PM_TDO
—
PM_TCK
TDO
TMS_6AT6
CLTENb
VPS0
VPS1
—
PM_SCL
PM_SCA
—
—
—
VMON1
—
VMON2
—
VMON3
VMON4_GS
VMON4
VMON5_GS
VMON5
VMON6_GS
VMON6
TRIM6
TRIM5
TRIM4
—
—
—
—