Kontron MITX-CFL0 Series User Manual page 57

Pin Signal
27 GND
28 NC
29 PETn1
30
NC
31 PETp1
32 NC
33 GND
34 NC
35 PERn1
36 NC
37 PERp1
38 DEVSLP
39
GND
40 NC
41 PETn0/SATAB+
42 NC
43 PETp0/SATAB-
44 NC
45 GND
46 NC
47 PERn0/SATAA-
48 NC
49 PERp0/SATAA+
50 PERST
51 GND
52 CLKREQ
53 REFCLKN
54 PEWAKE
55 REFCLKP
56 NC
57 GND
58 NC
59 KEY M
60 KEY M
61 KEY M
62 KEY M
63 KEY M
64 KEY M
65 KEY M
66 KEY M
67 NC
68 SUSCLK
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Description
Ground
PCIe Lane 1 transmitter pair (-)
PCIe Lane 1 transmitter pair (+)
Ground
PCIe Lane 1 receiver pair (-)
PCIe Lane 1 receiver pair (+)
Device sleep
Ground
PCIe Lane 0 transmitter pair (-) / SATA transmitter differential pair (+)
PCIe Lane 0 transmitter pair (+) / SATA transmitter differential pair (-)
Ground
PCIe Lane 0 receiver pair (-) / SATA receiver differential pair (-)
PCIe Lane 0 receiver pair (+) / SATA receiver differential pair (+)
PCIe reset
Ground
Reference clock request signal
PCIe reference clock pair (-)
PCIe wake
PCIe reference clock pair (+)
Ground
32.768 kHz clock supply input
MITX-CFL0 Series - User Guide, Rev. 1.1
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