Schematic Diagrams - NXP Semiconductors UJA116 A Series User Manual

NXP Semiconductors
4

Schematic diagrams

VIO_RSTN
D4
12 V
C
J2
1
SILK=12 V
LED_RED
2
SILK=GND
SILK=V1
HDR_1X2
BAT
CON PWR 3
J6
D1
1
A C
3
PMEG3020EH
2
C1
100 µF
TP1 TP2
LED_GRN
SILK=BAT
USER INTERFACE
J3
1 TXD
SILK=TXD
2 RXD
SILK=RXD
3 CTS_SDO
SILK=SDO
4 NC_SDI
SILK=SDI
5 NC_SCK
SILK=SCK
STBN_SLPN_SCSN
6
SILK=SCS
7
SILK=GND
8
SILK=V1
9 VIO_RSTN
SILK=RST
NC_INH_VEXT
10
SILK=VEXT
11 NC_WAKE
SILK=WAKE
12
SILK=GND
HDR_1X12
(1) Component not populated.
Figure 13. UJA1168AXF-EVB schematic diagram
UM11379
User manual
BUF_VCC_V1
R9
1 k
A V1_LED
C8
4.7 µF
TP3
TP10
R1
1 k
C2 TP4 TP11
NC_INH_VEXT VEXT
0.1 µF
TP5
TXD
RXD
CTS_SDO
D2
C9
UJA1168ATK/XF
4.7 µF
STBN_SLPN_SCSN
SILK=SCS
NC_SDI
SILK=SDI
CTS_SDO
SILK=SDO
NC_SCK
SILK=SCK
BUF_VCC_V1
SILK=GND
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TP14
C3
0.01 µF (1)
TP15
R5
10 k
TP6
U1
BAT RSTN
10 5
SCSN STBN_SLPN_SCSN
V1
14
3
NC_WAKE
WAKE
9
7
CANH CANH
TXD 13
1
CANL CANL
RXD 12
4
SDI NC_SDI
SDO
11
6
SCK NC_SCK
8
2 15
GND EPAD
TP7 TP9
ARDUINO INTERFACE
J4
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
TXD
SILK=TXD
19 20 RXD
SILK=RXD
HDR_2X10
Rev. 1 — 23 April 2021
UJA116xA evaluation boards
TP8
BAT
R6 R7
10 k PB_WAKE 10 k
SW1 C7
SW_SPST_TH 0.01 µF
TP12
3 4
L1
100 uH
1 2
R2 R3
TP13
62 62
CAN_T
C4
4700 pF
C5
51 pF
VIN
J5
16 15
SILK=VIN
14 13
SILK=GND
12 11
10 9 VCC
8 7
SILK=RST
6 5 RSTN
4 3 V1_VIO SILK=VIO
2 1
SILK=VIN
12 V
HDR_2X8
J8
HDR_1X2
JUMPER (DEFAULT) = ON
UM11379
J1
PORT_CANH
1
SILK=H
PORT_CANL
2
SILK=L
HDR_1X2
1 2 SILK=CAN
D3
PESD1CAN
3
C6
51 pF
BUF_VCC_V1
R4, 0 (1)
R11, 0
VIO_RSTN
R10, 0 (1)
J7
HDR 1X2
JUMPER (DEFAULT) = ON
aaa-040339
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