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2.2.4 VIO/V1 connections (UJA1166A-EVB)
UM11379
User manual
A V
supply is needed for the digital IOs. The V
IO
interface supply voltage. V
The V1 supply voltage is generated by the internal 5 V regulator and is intended to
supply peripheral circuitry, e.g. additional CAN transceivers. Detailed information on
the functionality and operation of the UJA1166A can be found in the data sheet and
application hints (see
Table 6. VIO/V1 connections
UJA1166A
VIO (pin 5)
V1 (pin 3)
The V
supply can be connected to either J3 or J5. The V1 output voltage is available
IO
on J3. J3 is located on the top of the evaluation board and J5 is mounted on the bottom.
Decoupling capacitor C8 is provided to stabilize output voltage on V1 and remove noise.
Red LED D4 lights up once the V1 output is present.
UJA1166A
Figure 5. V1 and VIO supply connection options (only relevant for UJA1166A-EVB)
All information provided in this document is subject to legal disclaimers.
is not needed in Sleep mode.
IO
Section
7).
UJA1166A-EVB
J3-09 or J5-05: connect MCU-compatible supply voltage
J3-08: connect peripherals to be supplied from V1
J3
VIO(p5)
VIO
V1(p3)
V1
C8
4.7 µF
GND(p2)
GND
Rev. 1 — 23 April 2021
UJA116xA evaluation boards
voltage must be aligned with the MCU
IO
R10
0 Ω
C3
R9
10 nF
1 kΩ
D4
LED
UM11379
J5
VIO
GND
aaa-040308
© NXP B.V. 2021. All rights reserved.
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