Memory; Ddr3 Sdram Interface; Table 5 - Gtx Pin Assignments For Baseboard Fmc, Sfp, Dp And Sma Connectors - Avnet Xilinx Zynq 7Z045 Manual

Bank 109 GTX Instance
GTX_X0Y0
(SMA)
GTX_X0Y1
(Display Port)
GTX_X0Y2
(SFP)
GTX_X0Y3
(FMC)
Table 5 – GTX Pin Assignments for Baseboard FMC, SFP, DP and SMA Connectors
2.3

Memory

The Zynq 7Z045 Mini-Module Plus Development Board is populated with both high-speed RAM
and non-volatile ROM to support various types of applications. Each development board has five
memory interfaces:
1. DDR3: 1GB x32 DDR3 SDRAM
2. 32 MB QSPI Flash
3. 256 MB Parallel Flash x16
2
4. 8 KB I C EEPROM
5. SD Micro Card
2.3.1

DDR3 SDRAM Interface

Two Micron DDR3 SDRAM devices, part number MT41K256M16HA-125E:E, make up the 1
GB x32 SDRAM memory interface. Each device provides 512 MB of memory on a single IC
and is organized as 32 Megabits x 16 x 8 banks. The device has an operating voltage of 1.5 V
and the interface is JEDEC Standard SSTL_15 (Class I for unidirectional signals, Class II for
bidirectional signals). The -125E speed grade supports 1.25 ns cycle times with 11 clock read
latency (DDR3-1600). The following figures show a high-level block diagram of the DDR3
SDRAM interface on the development board
Net Name
JX1_MGTTX3_P
JX1_MGTTX3_N
JX1_MGTRX3_P
JX1_MGTRX3_N
JX1_MGTTX2_P
JX1_MGTTX2_N
JX1_MGTRX2_P
JX1_MGTRX2_N
JX1_MGTTX1_P
JX1_MGTTX1_N
JX1_MGTRX1_P
JX1_MGTRX1_N
JX1_MGTTX0_P
JX1_MGTTX0_N
JX1_MGTRX0_P
JX1_MGTRX0_N
Page 15
7Z045 Pin #
AK2
AK1
AE8
AE7
AJ4
AJ3
AG8
AG7
AK6
AK5
AJ8
AJ7
AK10
AK9
AH10
AH9