Avnet Xilinx Virtex-II Programmable Logic Manuals

Manuals and User Guides for Avnet Xilinx Virtex-II Programmable Logic. We have 1 Avnet Xilinx Virtex-II Programmable Logic manual available for free PDF download: User Manual

Avnet Xilinx Virtex-II User Manual

Avnet Xilinx Virtex-II User Manual (25 pages)

Brand: Avnet | Category: Microcontrollers | Size: 0 MB

Table of Contents

Xilinx Virtex-II Development Kit
1
Table of Contents
2
Figures
3
Tables
3
Introduction
4
Description
4
Features
4
Demo Applications
4
Ordering Information
5
User Information
5
Power
5
Configuration
5
Table 1: Ordering Information
5
Boundary Scan Configuration
6
System ACE MPM Configuration
6
Selectmap and Custom Configuration Methods
6
Figure 1 - Fly Wire Connection J2
6
Table 2 - JTAG Headers (JTAG3 & JTAG4) Pin-Out
6
Configuration Modes
7
Table 3 - Virtex-II Power-Up Configuration Modes
7
JTAG Chain
8
Figure 2 - JTAG Chain
8
Table 4 - JTAG Boundary-Scan Description Language (BSDL) Files
8
Jumper Settings
9
Figure 3 - JP1
9
Figure 4 - I/O Voltage Selection
9
Hardware
11
Figure 5 - Virtex-II Development Board Block Diagram
11
Figure 6 - Virtex-II Development Board
11
Virtex-II FPGA
12
Lvds
12
Memory
12
Ddr Sdram
12
Flash
12
Communication
12
RS232 Transceiver
12
Table 5 - RS232 Connector Pin-Out
12
Led
13
Dip Switches
13
Connectors
13
Table 6 - LED Pin Assignment @ the FPGA
13
Table 7 -Switch Pin Assignment @ the FPGA
13
General I/O Interface
14
Table 8 - General I/O Avbus Connector P2 & P3
15
Lvds
16
Table 9 - Low Voltage Differential Signaling Pairs (P3)
16
Memory Expansion Connector Interface
17
Table 10 - Memory I/O Avbus Connector P4 & P5
18
Auxiliary Connectors(Available Only with FF1152 Package)
19
Miscellaneous Connectors
20
Table 11 - Auxiliary Avbus Connector P6 & P7
20
Pci/Pcix
21
Table 12 - PCI/PCI-X Connector Pin Assignment and Interface Signals
22
Evaluation Boards
23
Extender Card Board
23
3.10 Power
23
FPGA I/O Voltage (Vcco)
23
FPGA Reference Voltage (Vref)
23
3.11 Configuration Modes
23
Figure 7 - Barrel Power Connector "J4
23
Test Designs
24
Table 13 - Virtex-II Power-Up Configuration Modes
24
Table 14 - System ACE Test Designs
24
On-Board Flash Test
25
PCI/PCI-X Test
25
Switch/Led Test
25
Avbus Connector Test
25
DDR SDRAM Test
25
Example VHDL Project
25

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