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Xilinx Spartan-3
Avnet Xilinx Spartan-3 Manuals
Manuals and User Guides for Avnet Xilinx Spartan-3. We have
1
Avnet Xilinx Spartan-3 manual available for free PDF download: User Manual
Avnet Xilinx Spartan-3 User Manual (33 pages)
Brand:
Avnet
| Category:
Microcontrollers
| Size: 0 MB
Table of Contents
Table of Contents
2
1 Introduction
4
Description
4
Features
4
Figure 1 - Spartan-3 Dev (Top Side) Figure 2 - Spartan-3 Dev (Bottom Side)
4
Demo Applications
5
Ordering Information
5
2 Hardware
5
Figure 3 - Spartan-3 Development Board Picture
5
Table 1: Ordering Information
5
Configuration
6
Figure 4 - Spartan-3 Development Board Block Diagram
6
Spartan-3 FPGA
6
Table 2 - Spartan-3 Attributes by Density
6
Figure 5 - Boundary Scan Mode Selection Via JP2
7
Figure 6 - Configuration / Debug Connections - Par3
7
Figure 7 - Configuration / Debug Connections - Par IV
7
Table 3 - JTAG Headers (Par-3 & Par-4) Pin-Out
7
Figure 8 - JTAG Chain Standalone Mode (Default)
8
Figure 9 - Design Revision "BIT SEL" Jumpers JP3
8
Table 4 - JTAG Chain Selection "JP6
8
Figure 10 - Fly Wire Connection J1
9
Table 5 - FPGA Configuration from PROM
9
Figure 11 - FPGA Configuration Mode Select
10
Figure 12 - Design Revision Select
10
Jumper Settings
10
Figure 13 - I/O Voltage Selection Banks 4&5
11
Figure 14 - I/O Voltage Selection Banks 1&2
11
Figure 15 - I/O Voltage Selection Banks 2&3
11
Figure 16 - Default Jumper Placement
13
Clocks
14
On Board Displays (2X20 LCD & 128X64 OLED)
14
Table 6 - Available GCLK Sources
14
Table 7 - Available Non-GCLK Osc
14
Table 8 - 2X20 Character LCD Pin-Out
15
Table 9 - OLED Display Pin-Out
16
Table 10 - OLED Display FPGA Pin-Out
17
VGA (DB15 & Video DAC)
17
Table 11 - Video DAC - FPGA Pin-Out
18
Table 12 - Video DAC Jumpers
18
Audio Codec
19
Table 13 - Audio Codec - FPGA Pin-Out
19
Table 14 - Audio Codec Jumpers
19
Dip & Push-Button Switches
20
PS2 Keyboard & Mouse Ports
20
Table 15 - Dipswitch FPGA Pin-Out
20
Table 16 - Pushbutton FPGA Pin-Out
20
High-Speed Serial Communication
21
Leds
21
Piezo Buzzer
21
Table 17 - LED FPGA Pin-Out
21
Table 18 - LVDS FPGA Pin-Out
22
Memory
23
Table 19 - Timing Parameters for DDR SDRAM Peripheral
23
Communication (RS232, 10/100 Ethernet, USB2.0)
24
Table 20 - RS232 FPGA Pin-Out
24
Table 21 - RS232 Connector Pin-Out
24
Figure 17 - Resistor Jumper Pin-Out
25
Table 22 - Ethernet PHY Modes
25
Table 23 - Ethernet Jumpers and Leds
25
Table 24 - Ethernet FPGA Pin-Out
26
Table 25 - USB Interface FPGA Pin-Out
27
I/O Connectors
28
Table 26 - Avbus Connector "P1" Pin-Out
29
Table 27 - Avbus Connector "P2" Pin-Out
30
Table 28 - Header "JP1" Pin-Out
31
Figure 18 - Barrel Power Connector "J7
32
Power
32
3 Software/Bsp
33
What Is Included
33
Hello World
33
On-Chip Peripheral Bus (OPB) External Memory Project(S)
33
Web Server
33
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